Design of energy-efficient smart wearables
Barry de Bruin defended his PhD thesis at the Department of Electrical Engineering on Wednesday November 27.
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Smart wearable monitoring devices (or smart wearables) for chronic neurological diseases like epilepsy and Parkinson鈥檚 disease are expected to greatly improve the quality of life of patients. Additionally, these smart wearables could significantly reduce healthcare costs by enabling diagnosis and treatment outside the hospital. Unfortunately, existing smart wearables often have a short battery life or are designed for a fixed function and cannot support new applications. In his PhD research, Barry de Bruin designed a new energy-efficient computing platform for smart wearables that is flexible enough to support future applications while also being relatively easy to program.
The basis of his computing platform is a coarse-grained configurable architecture (CGRA). A CGRA is a special type of processor that can be reconfigured multiple times during program execution to perform calculations with a much higher energy efficiency than a general-purpose processor (GPP).
Traditionally, CGRAs excelled at executing parts of a program where the calculations are relatively static/predictable and repeated many times on different data points. Other, dynamic and less frequent parts of a program were typically executed on a GPP that sits next to the CGRA.
However, the introduction of smart wearables, with their increasingly complicated and fast-evolving applications, requires modern CGRAs to be more flexible and easier to program.
Energy benefits of a flexible CGRA
CGRAs with the highest energy efficiency typically only support a small set of programs. Increasing a CGRA鈥檚 flexibility inherently reduces its energy efficiency but enables more of the program to run on the CGRA (instead of the less efficient GPP).
Demonstrating the energy benefits of a flexible CGRA in a real-world application is difficult. Every part of the computing platform, especially for smart wearable devices, needs to be well-optimized.
In his PhD thesis, built a system prototype for a complex epileptic seizure application and created a test chip that combined a RISC-V GPP with a CGRA.
Using this setup, he demonstrated that the CGRA provided enough flexibility to execute 92.25% of the seizure detection application, which reduced the energy consumption by 3.7x (and up to 5.4x with additional chip optimizations).
Reducing CGRA programming effort
Early CGRAs were programmed manually, which is a very cumbersome but important first step towards automating the code generation process for rapid application development.
However, the lack of standardization across CGRAs means that even recent CGRAs often need to reinvent the wheel. Finding a standardized CGRA programming model and compiler has been a long-standing research challenge.
To address this programming challenge, De Bruin adopted an existing code generation framework for a well-defined class of specialized processors known as exposed data path architectures.
He demonstrated the effectiveness of this CGRA code generation approach on 15 complex programs in terms of performance, code quality, and energy efficiency. To facilitate the integration of CGRAs in chips for smart wearables, he introduced the R-Blocks CGRA design framework.
The future of CGRA-based systems
The tools and solutions presented in the thesis of De Bruin provide an important step towards using CGRAs in future smart wearables by tackling two main challenges: showing the energy benefits of flexible CGRAs at the system-level and reducing the CGRA programming effort by adopting well-established compiler technology.
Title of PhD-thesis: . Supervisors: Henk Corporaal (果冻传媒), Jos茅 Pineda de Gyvez (果冻传媒), and Pekka J盲盲skel盲inen (Tampere University).