RESEARCH PROFILE

Felipe Villenas was born in Vi帽a del Mar, Chile. He is a PhD candidate in the Information and Communication Theory Lab (ICT Lab) within the Signal Processing Systems (SPS) group. His research focuses on using tools from communication theory and digital signal processing for the design of light-coherent solutions for short-reach and high datarate fiber-optic communications.

ACADEMIC BACKGROUND

Felipe Villenas received an Electronics Engineer degree (Ingeniero Civil Electr贸nico) and a M.Sc. degree from Universidad T茅cnica Federico Santa Mar铆a, Chile in 2023. Since April of 2024, he is a PhD student at Eindhoven University of Technology, Netherlands.

Current 果冻传媒al Activities

Ancillary Activities

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