Wideband Data Converters Lab

In our research on data converters we focus on the contradicting demands of high speed, high accuracy, small size and low power consumption of analog-to-digital (AD) and digital-to-analog (DA) converters, with a special emphasis on the Sigma-Delta Modulation. In many of our converters, 鈥榮martness鈥� plays an important role. Smart and flexible AD and DA conversion implies on-chip intelligence, context awareness and adaptation to user and application conditions, ambient situations and actual system status. These converters can test themselves, measure own performance and calibrate themselves, such that their performance can be optimized for the specific situation and can be kept optimal under changing situations. Our ambitions are to enable massive integration of data converters for phased-array transceivers with hybrid and digital beamforming and for future Artificial Intelligence systems.

Research Profile

Important for our research are data converters based on sigma-delta modulation (SDM). We are working on the improvement of smart SDMs by applying our new limit-cycle theory to optimally correct their loop filters, their feedback DA converters and for stability estimation. We found new incremental methods, including a new decoding technique for highly accurate DC sensing with SDMs. In parallel we do research on ultra-high-speed SDM AD converters, using novel architectures that significantly relax the design requirements for meta-stability errors, for excess loop delay and for DAC jitter.

We derive and implement very high-speed high-resolution AD converter architectures, using a novel parallel sampling technique, exploiting information about the input signal distribution function.

Meet some of our Researchers

University Researcher

Qilong Liu

Doctoral Candidate

Issac Wang

Doctoral Candidate

Ronald Janssen

Doctoral Candidate-TA

Daan Dekker

Associate Professor

Georgi Radulov

Recent Publications

Our most recent peer reviewed publications

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